![[Home]](/images/hat.png)
GC1
GC1 is one of NickGuggemos's early ideas for building a CPU. Due to its complexity, the GC1 never made it past the "hey, that would be cool" stage. The GC1 is a (CISC)?y design with a highly orthogonal instruction set. Each instruction has a five bit opcode and a three bit adcode (address code), as well as two four-bit register addresses and (optionally) an extra word for immediate data or addresses.
The addressing scheme would have allowed data to be: part of the instruction (Immediate), in a register (Direct), in a register pointed to by a register specified in the instruction (Register Indirect), in a memory location pointed to by two adjacent registers specified in the instruction (Memory Indirect). Some combinations of these address modes were not allowed, leaving only 8 combinations.
The GC1 was abandoned in part because of the complexity introduced by the large number of addressing modes.
